For example, Japanese Patent Application Laid-Open Publication No. 2002-176137 (Patent Document 1) discloses a stacked-type semiconductor device having a plurality of semiconductor integrated circuit chips stacked on a base board, each semiconductor integrated circuit chip being connected to another chip via a through plug penetrating the chip or BGA (ball grid array). In this stacked-type semiconductor device, the heat dissipation efficiency etc. are improved by, for example, stacking the chips in decreasing order of power consumption.
Also, Japanese Patent Application Laid-Open Publication No. 2005-129881 (Patent Document 2) discloses a three-dimensional semiconductor integrated circuit device configured with two semiconductor chips and a wiring base chip, in which planes of the chips including connecting terminals face each other with being electrically and mechanically connected to each other. This three-dimensional semiconductor integrated circuit device is configured to interface between the chips by the amplitude of the source voltage used in the microfabrication process.